https://xichen1997.github.io/tags/cache/Recent content in Cache on Xi's BlogHugo -- 0.154.5en-usMon, 15 Apr 2024 00:05:14 -0400https://xichen1997.github.io/posts/2023-04-15-hpc2-memory-hierarchy/Mon, 15 Apr 2024 00:05:14 -0400https://xichen1997.github.io/posts/2023-04-15-hpc2-memory-hierarchy/<h1 id="hierarchy-memory">Hierarchy Memory</h1> <h2 id="1-why-use-hierarchy-memory">1. Why use Hierarchy Memory</h2> <p>Because the register memory is much faster than main memory, in fact the difference is about two magnitude. And the performance gap will be larger because the CPU&rsquo;s speed increase faster than main memory.</p> <p>In this situation, if we fetch data from the main memory too many times, the expense will be very expensive. But if we create some memory which is faster than main memory but a little bit slower than register memory. We call it cache.</p>